Software-defined radios (SDR) are reconfigurable communication systems that transcend boundaries between hardware and software subsystems, physical and logical layers, and analog and digital domains. The fact is that, important application domains like mobile phones, sensor networks, visible light communications, and radio frequency localization that could benefit from radical approaches which will require small low unit costs, or low-power operation has remained relatively unexplored. This is partly due to high-performance wireless protocols and radio designs that are not easy to design, implement, or evaluate using traditionally-layered approaches that rigidly partition functionality. In this article, I will highlight the challenges of the architectural design of the SDR-capable low-power wireless sensor platform as listed out by Sandor Szilvasi of the Vanderbilt University.
Power consumption: Reduced power consumption and efficient power management techniques are key features that enable the ad-hoc and long-term deployment of WSNs. While in terms of power efficiency, the proposed reconfigurable platform is not expected to directly compete with highly integrated COTS radio transceivers, it should run complete WSN protocol stacks with power consumption much closer to that of WSN nodes than to desktop SDRs. Duty cycling and clock scaling are two essential power saving techniques that existing desktop SDRs lack due to the inherent limitations of SRAM technology-based FPGAs, but the proposed platform needs to offer. To evaluate the performance of such techniques, the platform should also provide the means to monitor and log the power consumption for detailed analysis.
Computational resources: Existing SDR platforms offer design flexibility through direct access to the baseband radio signals along with an immense amount of reconfigurable computing resources to process them. In contrast, existing low-power sensor nodes lack such computational power by definition, and could not process the received radio signals even if they were accessible. Thus, although aimed to be low-power, the proposed platform is required to provide adequate amount of reconfigurable computational resources to define and experiment with novel WSN communication protocols that involve substantial PHY layer signal processing.
Development framework: The development of FPGA applications in hardware description languages (HDL) is generally associated with a steep learning curve and long development times. However, several algorithmic and model-based high-level synthesis (HLS) tools exist that simplify HDL design entry and also allow for extensive model-based simulations. Therefore, to minimize the HDL implementation effort and improve the simulation fidelity of PHY layer components, the platform should be accompanied with a workflow that integrates model-based HLS tools and a set of basic infrastructure components. Furthermore, the framework should provide a means to stream the raw PHY layer signals to a computer for offline analysis.
In addition, the design of the sensor network communication protocol that potentially benefits from the use of custom PHY layer waveforms faces the following challenges:
Asymmetric radio link: The vast majority of the proposed WSN communication protocols almost exclusively focuses on the design of energy efficient MAC layers with time-division multiple access (TDMA) or carrier-sense multiple access (CSMA) schemes, probably because the PHY layer of the COTS radio chips used on existing sensor platforms naturally supports these approaches but not others. However, there are alternative access schemes that offer a collision free medium at the cost of additional computational complexity, which can be distributed asymmetrically between a simple transmitter and a complex receiver. This asymmetry may be exploited in the vicinity of a resourceful basestation to enable sensor nodes to report sensor data asynchronously and simultaneously, while keeping their complexity low.
Cheap Software-Defined Radio: With some cheap hardware and free software, you can listen in on digital and analog signals across a wide range of radio spectrum.
Rapid synchronization: The communication in typical WSN applications is characterized by short packet lengths and low communication data rate, in the order of tens of bytes per 2 second. Furthermore, the network traffic is often busty because neighbouring sensor nodes tend to react to the same external events. Therefore, robust detection and demodulation of the quasi-simultaneously arriving messages impose tight synchronization requirements on the receiver.
In Sandor’s contribution, a modular wireless research platform that addresses the low-power requirements of WSNs and the high-performance computational demand of SDRs simultaneously was proposed. The presented platform provides a means to approach the WSN research from the PHY layer perspective, consequently, to inspire ideas that are free from the architectural constraints imposed by the particular implementation of the few prevailing radio chips. To support his claim, two further contributions that include the development and experimental evaluation of a long-hop asymmetric-link communication protocol and a multi-carrier radio frequency distance estimation method, both of which heavily rely on custom PHY layer waveforms were performed.